OSPI RX Sample Delay Register
| RSD | RXD Sample Delay. This bit field is used to delay the sample of the RXD input port. Each valuere presents a single OSPI_CLK delay on the sample of RXD. Note: If this bit is programmed with a value that exceeds the depth of the internal shift registers (internal shift register depth = 4) zero delay will be applied to the RXD sample. |
| SE | RXD Sampling Edge. This bit is used to decide the sampling edge for RXD signal with OSPI_CLK. Then this bit is set to 1 then negative edge of OSPI_CLK will be used to sample the incoming data, otherwise positive edge will be used for sampling. |